Mike Craren

Title: Mike Craren: Innovator in Efficient Processing Technologies

Introduction

Mike Craren is a notable inventor based in Holliston, MA (US). He has made significant contributions to the field of computer processing with a focus on efficient execution methods. With a total of 2 patents, Craren's work has advanced the capabilities of multi-threaded systems and memory utilization.

Latest Patents

Craren's latest patents include a "Method and apparatus for efficient loop instruction execution using bit vector scanning." This invention presents a method, apparatus, and computer program product designed to enhance loop instruction execution by utilizing bit vector scanning. The process involves scanning a bit vector, detecting the presence of bits set to a specific state, and executing corresponding routines efficiently.

Another significant patent is the "Method and apparatus for efficient memory bank utilization in multi-threaded packet processors." This invention addresses the challenges of memory latency by buffering memory access requests through First In First Out (FIFO) buffers. The memory controller distributes these requests evenly across memory banks, thereby optimizing performance in multi-threaded environments.

Career Highlights

Mike Craren is currently employed at Avaya Inc., where he continues to innovate in the field of technology. His work has been instrumental in developing solutions that improve processing efficiency and reduce latency in complex systems.

Collaborations

Craren has collaborated with notable colleagues such as Hamid Assarpour and Rich Modelski, contributing to a dynamic work environment that fosters innovation and creativity.

Conclusion

Mike Craren's contributions to efficient processing technologies through his patents reflect his commitment to advancing the field. His work at Avaya Inc. and collaborations with fellow innovators further enhance the impact of his inventions.