Barcelona, Spain

Mateo Valero Cortes

This inventor holds 3 USPTO granted patents. Top assignees: University of California, Barcelona Supercomputing Center-Centro Nacional De Supercomputacion, Universitat Politécnica De Catalunya. Active years: 2008-2022.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Mateo Valero Cortes. Retrieved from https://idiyas.com/inventor/mateo-valero-cortes

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 4.3

ph-index = 1

Forward Citations = 14(Granted Patents)


Company Filing History:


Years Active: 2008-2022

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3 patents (USPTO):Explore Patents

Title: **Innovative Contributions of Mateo Valero Cortes**

Introduction

Mateo Valero Cortes is a prominent inventor based in Barcelona, Spain, recognized for his influential work in the field of parallel computing systems. With a total of three patents to his name, Valero Cortes has made significant strides in the technical management of task dependencies and the operation of computer processors.

Latest Patents

His latest patents include groundbreaking methods for managing task dependencies in hardware processing systems. One of his pivotal inventions, titled "Method of managing task dependencies at runtime in a parallel computing system of a hardware processing system," proposes innovative solutions for hardware-based dependency management to support nested tasks. This method effectively resolves system deadlocks that can occur due to limited memory conditions in dedicated hardware memory. Additionally, he introduces buffered asynchronous communication of larger data exchanges, which reduces reliance on multi-core processor elements, thereby enhancing performance, reducing fabrication costs, and saving energy during operation.

Another significant patent, "Tracking multiple dependent instructions with instruction queue pointer mapping table linked to a multiple wakeup table by a pointer," enhances the functionality of out-of-order computer processors. This invention employs a novel approach to managing instruction wakeup through pointers and a mapping table, resulting in reduced power consumption and improved recovery from branch mis-prediction—all without the use of content-addressable memory cells.

Career Highlights

Throughout his career, Mateo Valero Cortes has collaborated with esteemed institutions such as the University of California and the Barcelona Supercomputing Center—Centro Nacional De Supercomputación. His academic and research experiences have played a crucial role in shaping his innovative inventions.

Collaborations

In his journey as an inventor, Valero Cortes has worked alongside notable coworkers, including Alexander V. Veidenbaum and Adrian Cristal Kestelman. These collaborations have fostered an environment of innovation, contributing to the advancement of technologies in parallel computing.

Conclusion

Mateo Valero Cortes exemplifies the spirit of innovation through his patents and contributions to the computing industry. His work not only addresses current challenges in parallel processing but also paves the way for future developments in technology. As a leading inventor, he continues to inspire the next generation of innovators seeking to make their mark in the world of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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