Hamamatsu, Japan

Masataka Ikesu

This inventor holds 7 USPTO granted patents and 3 published patent applications. Top assignee: Hamamatsu-Photonics K.k.. Active years: 2020-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Masataka Ikesu. Retrieved from https://idiyas.com/inventor/masataka-ikesu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 7 

% Patents Active = 100.0

Average Co-Inventor Count = 2.5

ph-index = 1


Company Filing History:


Years Active: 2020-2025

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7 patents (USPTO):Explore Patents

Title: Masataka Ikesu: Innovator in Semiconductor Technology

Introduction

Masataka Ikesu is a prominent inventor based in Hamamatsu, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 7 patents. His work focuses on innovative devices and methods that enhance semiconductor failure analysis.

Latest Patents

Ikesu's latest patents include a semiconductor failure analysis device and a semiconductor failure analysis method. The semiconductor failure analysis device features a first analysis unit that emits first irradiation light along a designated path on the main surface of a semiconductor device. Additionally, a second analysis unit emits second irradiation light along a path on the back side of the semiconductor device. An electric signal acquisition unit captures the electric signal output from the semiconductor device when irradiated with both light sources. The computer controlling the second analysis unit ensures that the entire second irradiation region overlaps the first irradiation region during the analysis process.

Another notable patent is the wafer conveyance unit and wafer conveyance method. This invention is designed to convey a wafer while securely holding it within a semiconductor failure analysis apparatus. The wafer conveyance unit includes a placement table that fixes the wafer at a predetermined observation position and a wafer chuck that conveys the wafer to this position. The wafer chuck is equipped with multiple holding members that sandwich the peripheral portion of the wafer, ensuring stability during analysis.

Career Highlights

Masataka Ikesu is currently employed at Hamamatsu Photonics K.K., where he continues to develop cutting-edge technologies in semiconductor analysis. His expertise and innovative approach have positioned him as a key figure in the industry.

Collaborations

Ikesu collaborates with talented coworkers, including Ikuo Arata and Toshimichi Ishizuka. Their combined efforts contribute to the advancement of semiconductor technology and the development of new analytical methods.

Conclusion

Masataka Ikesu's contributions to semiconductor technology through his innovative patents and collaborative efforts highlight his importance in the field. His work continues to influence advancements in semiconductor failure analysis, making a significant impact on the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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