Masaru Yano

Title: Masaru Yano: Innovator in Semiconductor Memory Technology

Introduction

Masaru Yano is a prominent inventor based in Sunnyvale, CA, known for his significant contributions to semiconductor memory technology. With a total of 11 patents to his name, Yano has made remarkable advancements in the field of multi-bit flash electrically erasable programmable read-only memory (EEPROM) devices.

Latest Patents

Yano's latest patents include innovative designs such as a dual bit memory device with isolated polysilicon floating gates. This invention focuses on semiconductor memory devices that utilize charge trapping within a floating gate to represent a 0 or 1 bit state. Another notable patent is the multi-set block erase method, which provides a systematic approach for selecting groups of memory blocks in a flash memory device based on their starting and ending addresses. This method enhances the efficiency of memory block selection and decoding processes.

Career Highlights

Throughout his career, Masaru Yano has worked with leading technology companies, including Advanced Micro Devices Corporation and Fujitsu Corporation. His expertise in semiconductor technology has positioned him as a key player in the development of advanced memory solutions.

Collaborations

Yano has collaborated with notable professionals in the industry, including Michael S Chung and Shane Charles Hollmer. These collaborations have contributed to the advancement of innovative memory technologies.

Conclusion

Masaru Yano's contributions to semiconductor memory technology through his patents and collaborations highlight his role as a leading inventor in the field. His work continues to influence the development of efficient memory devices that are essential in modern technology.