The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 02, 1999

Filed:

Oct. 20, 1998
Applicant:
Inventors:

Pau-Ling Chen, Saratoga, CA (US);

Michael Van Buskirk, Saratoga, CA (US);

Shane C Hollmer, San Jose, CA (US);

Michael S Chung, San Jose, CA (US);

Binh Quang Le, Mountain View, CA (US);

Vincent Leung, Mountain View, CA (US);

Shoichi Kawamura, Sunnyvale, CA (US);

Masaru Yano, Sunnyvale, CA (US);

Assignees:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ; G11C / ;
U.S. Cl.
CPC ...
36518517 ; 36518518 ; 36518523 ;
Abstract

In the programming of a non-volatile memory device, such as a NAND flash memory device 100, a positive bias voltage V.sub.bias is applied to a bit line 44 to set a respective memory gate 44a in a programmed state. In a further embodiment, the positive bias voltage V.sub.bias is obtained by dividing the select drain gate voltage V.sub.cc using two resistors 56 and 58 connected in series.


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