Osaka, Japan

Masaru Takeuchi

This inventor holds 9 USPTO granted patents. Top assignee: Sanyo Electric Co., Ltd.. Active years: 1986-1998.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Masaru Takeuchi. Retrieved from https://idiyas.com/inventor/masaru-takeuchi-1eq7pqst

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 4.1

ph-index = 5

Forward Citations = 97(Granted Patents)


Location History:

  • Hirakata, JP (1988)
  • Kyoto, JP (1986 - 1989)
  • Uji, JP (1987 - 1989)
  • Osaka, JP (1990)
  • Ogaki, JP (1998)

Company Filing History:


Years Active: 1986-1998

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9 patents (USPTO):Explore Patents

Title: Masaru Takeuchi: Innovator in Semiconductor Technology

Introduction

Masaru Takeuchi is a prominent inventor based in Osaka, Japan, known for his significant contributions to semiconductor technology. With a total of nine patents to his name, Takeuchi has made remarkable advancements in the field, particularly in the manufacturing of thin film transistors and electrostatic latent image forming apparatuses.

Latest Patents

One of Takeuchi's latest patents is a manufacturing method of semiconductor devices. This method focuses on providing a manufacturing technique for thin film transistors (TFT) using poly-silicon with an LDD structure. The LDD sections of the TFTs are formed using an improved method that enhances throughput and stabilizes performance. Specifically, the LD region is doped at a low concentration through an ion implantation method that includes mass spectrometry, ensuring high controllability over the dose. Conversely, the source and drain regions are doped at a higher concentration using an ion showering method that does not involve mass spectrometry. This approach minimizes doping damage to poly-crystal silicon and allows for lower annealing temperatures, such as RTA, to activate doped impurities without causing substrate curvature. The combination of these methods results in high throughput production of TFTs with stable performance.

Another notable patent is for an electrostatic latent image forming apparatus. This apparatus features a dielectric drum that is uniformly charged by a charging corotron. The recording head consists of a transparent base plate, a transparent electrode, and a photoconductive layer made of amorphous silicon. Discharging electrodes are formed on the photoconductive layer, and a bias voltage with reverse polarity is applied. When a light signal corresponding to the desired image is introduced, carriers are generated in the photoconductive layer, allowing for the formation of an electrostatic latent image on the dielectric drum.

Career Highlights

Masaru Takeuchi has had a distinguished career at Sanyo Electric Co., Ltd., where he has been instrumental in developing innovative technologies in the semiconductor sector. His work has not only advanced the field but has also contributed to the overall growth of the company.

Collaborations

Throughout his career, Takeuchi has collaborated with notable colleagues, including Yukinori Kuwano and Takeo Fukatsu. These partnerships have fostered a creative environment that has led to groundbreaking inventions and advancements in technology.

Conclusion

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Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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