Los Gatos, CA, United States of America

Mark R Hartoog


Average Co-Inventor Count = 2.8

ph-index = 9

Forward Citations = 234(Granted Patents)


Company Filing History:


Years Active: 1993-1999

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10 patents (USPTO):Explore Patents

Title: Mark R Hartoog: Innovator in Integrated Circuit Design

Introduction

Mark R Hartoog is a prominent inventor based in Los Gatos, CA (US), known for his significant contributions to the field of integrated circuit design. With a total of 10 patents to his name, Hartoog has developed innovative methods and apparatuses that enhance the efficiency and performance of digital circuits.

Latest Patents

One of Hartoog's latest patents is a "Method and apparatus for making integrated circuits by inserting buffers." This invention discloses a technique for creating digital integrated circuits while considering ramp delay and clock skew as constraints. The method minimizes the number of inserted buffers and overall wire length connecting components for large clock trees. It involves developing a set of circuit specifications, including maximum clock skew, minimum driveability, and maximum ramp delay, which are described in a hardware description language on a digital computer system. A netlist is synthesized from this hardware description, and a modified netlist is formed by analyzing the netlist and inserting buffers to meet the circuit specifications. Ultimately, a digital integrated circuit is produced as specified by the modified netlist.

Another notable patent is the "Method for automatically routing circuits of very large scale." This invention presents an automated routing tool for interconnections between circuit elements, standard cells, and cell blocks of cell-based designs. It combines the best features of existing gate array routing techniques with cell-based routing techniques. The method eliminates the disadvantages of allowing the detailed router to adjust the relative positions of circuit elements during the routing process. A topology manager is employed to compact the circuit topology while optimizing the routing of interconnections. The method utilizes bin-based global routing to identify expandable boundaries, which informs a compaction routine that adjusts the expandable areas based on the global routing results.

Career Highlights

Throughout his career, Mark R Hartoog has worked with notable companies such as VLSI Technology, Inc. and VSLI Technology, Inc. His experience in these organizations has contributed to his expertise in integrated circuit design and innovation.

Collaborations

Hartoog has collaborated with talented individuals in the field, including Jacob Greidinger and Sunil V Ashtaputre. These collaborations have further enriched his work and contributed to advancements in circuit design.

Conclusion

Mark R Hartoog is a distinguished inventor whose work in

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