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Tucson, AZ, United States of America

Mark J Mercer

This inventor holds 11 USPTO granted patents. Top assignees: National Semiconductor Corporation, Other. Active years: 1984-2004.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Mark J Mercer. Retrieved from https://idiyas.com/inventor/mark-j-mercer

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 11

% Patents Active = 100.0

Average Co-Inventor Count = 1.3

ph-index = 10

Forward Citations = 172(Granted Patents)

Location History:

Chicago, IL (US) (1984)
Tuscon, AZ (US) (2001)
Tucson, AZ (US) (1999 - 2004)

Company Filing History:

10 out of 4,791

National Semiconductor Corporation

1 out of 834,453

Other

patents

Years Active: 1984-2004

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11 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 6781450 - Low-frequency auto-zeroed amplifier (2004-08-24),

2. 6329804 - Slope and level trim DAC for voltage reference (2001-12-11),

3. 6225782 - Method and apparatus for hi-Z mode battery charging (2001-05-01),

4. 6215291 - Reference voltage circuit (2001-04-10),

5. 6201379 - CMOS voltage reference with a nulling amplifier (2001-03-13),

6. 6198266 - Low dropout voltage reference (2001-03-06),

7. 6166521 - Current-to-voltage transition control of a battery charger (2000-12-26),

8. 6141193 - Shunt regulator with shutdown protection to prevent excessive power (2000-10-31),

9. 6100667 - Current-to-voltage transition control of a battery charger (2000-08-08),

10. 5982148 - Method and apparatus for monitoring the self discharge of a secondary (1999-11-09),

11. 4478546 - Quick insertion and release bolt system (1984-10-23),

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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