The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 13, 2001
Filed:
Oct. 13, 1999
Applicant:
Inventors:
David R. MacQuigg, Tucson, AZ (US);
Mark J. Mercer, Tucson, AZ (US);
Assignee:
National Semiconductor Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 3/16 ; G05F 3/20 ;
U.S. Cl.
CPC ...
G05F 3/16 ; G05F 3/20 ;
Abstract
A CMOS voltage reference comprises a band-gap core, a primary amplifier and a “nulling” amplifier. The voltage reference may also include slope, level and curvature trim circuits to provide a low-cost CMOS voltage reference that can be trimmed after final packaging. Due to the nulling of the errors from other sources by the nulling amplifier, the trim circuits are able to adjust the variations from the band-gap core. The nulling amplifier uses switching techniques to provide an accurate null, but is configured to avoid injecting switch transients into the voltage reference output.