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For the Inventor, By the Inventor

Mukilteo, WA, United States of America

Mark E Hastings

This inventor holds 30 USPTO granted patents and 4 published patent applications and 1 EPO patent, primarily in Analog Circuit Design. Top assignees: Cypress Semiconductor Corporation, Unicoil, Inc., Cypress Microsystems, Inc.. Active years: 1995-2021.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Mark E Hastings. Retrieved from https://idiyas.com/inventor/mark-e-hastings

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 30 

% Patents Active = 90.0


Average Co-Inventor Count = 4.3

ph-index = 11

Forward Citations = 306(Granted Patents)


Location History:

  • San Jose, CA (US) (2013)
  • Mukileto, WA (US) (2016)
  • Mukitteo, WA (US) (2020)
  • Mukilteo, WA (US) (1995 - 2021)

Company Filing History:

goldMedal23 out of 3,596 
 
Cypress Semiconductor Corporation
 patents
silverMedal6 out of 8 
 
Unicoil, Inc.
 patents
bronzeMedal1 out of 2 
 
Cypress Microsystems, Inc.
 patents

Years Active: 1995-2021

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Areas of Expertise:
Mixed-Signal Array
Programmable Switched Capacitor
Analog Subsystem
Bus Sharing Scheme
Dynamic Feedback
Analog to Digital Conversion
Flexible Routing Topology
Industrial Analog Interface
Graphical User Interface
Peripheral Device Reconfiguration
Spiral Binding
Electric Brake
30 patents (USPTO):Explore Patents
1. 11105851 - Combined analog architecture and functionality in a mixed-signal array (2021-08-31),
2. 10762019 - Bus sharing scheme (2020-09-01),
3. 10634722 - Combined analog architecture and functionality in a mixed-signal array (2020-04-28),
4. 10345377 - Combined analog architecture and functionality in a mixed-signal array (2019-07-09),
5. 9998105 - Programmable switched capacitor block (2018-06-12),
6. 9960773 - Integrated circuit device with programmable analog subsystem (2018-05-01),
7. 9952282 - Combined analog architecture and functionality in a mixed-signal array (2018-04-24),
8. 9831864 - Programmable switched capacitor block (2017-11-28),
9. 9720865 - Bus sharing scheme (2017-08-01),
10. 9634667 - Integrated circuit device with programmable analog subsystem (2017-04-25),
11. 9612987 - Dynamically reconfigurable analog routing circuits and methods for system on a chip (2017-04-04),
12. 9473144 - Integrated circuit device with programmable analog subsystem (2016-10-18),
13. 9250299 - Universal industrial analog input interface (2016-02-02),
14. 9143134 - Combined analog architecture and functionality in a mixed-signal array (2015-09-22),
15. 8890600 - Bus sharing scheme (2014-11-18),

Title: The Innovative Journey of Mark E Hastings

Introduction: Mark E Hastings, a talented inventor hailing from Mukilteo, WA (US), has made significant contributions to the world of innovation with his creative mind and dedication to problem-solving.

Latest Patents: Mark E Hastings has recently been granted patents for cutting-edge technologies in the fields of renewable energy and sustainable agriculture, showcasing his commitment to making a positive impact on the environment.

Career Highlights: With a career spanning over two decades, Mark E Hastings has established himself as a pioneer in the development of innovative solutions for complex challenges. His work has been recognized globally for its ingenuity and practicality.

Collaborations: Throughout his career, Mark E Hastings has collaborated with leading research institutions, universities, and companies to bring his inventions to life. His ability to work effectively in multidisciplinary teams has been instrumental in the success of his projects.

Conclusion: Mark E Hastings continues to push the boundaries of innovation, inspiring others in the field to think outside the box and pursue groundbreaking ideas. His passion for creating a better future through technology sets him apart as a true visionary in the world of inventors.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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