logo

For the Inventor, By the Inventor

Mississauga, Canada

Mark Bourgeault

This inventor holds 24 USPTO granted patents and 1 published patent application, primarily in Integrated Circuit Design. Top assignee: Altera Corporation. Active years: 2005-2022.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Mark Bourgeault. Retrieved from https://idiyas.com/inventor/mark-bourgeault

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 24 

% Patents Active = 75.0

Average Co-Inventor Count = 2.0

ph-index = 5

Forward Citations = 123(Granted Patents)


Company Filing History:

goldMedal24 out of 4,331 
 
Altera Corporation
 patents

Years Active: 2005-2022

Loading Chart...
Areas of Expertise:
Integrated Circuits
Partial Reconfiguration
Clock Skew Optimization
Asynchronous Signal Pipelining
Timing Closure Analysis
Programmable Logic Devices
Latency Adjustment
Circuit Performance
24 patents (USPTO):Explore Patents
1. 11507723 - Method and apparatus for performing incremental compilation using structural netlist comparison (2022-11-22),
2. 11507722 - Method and apparatus for performing incremental compilation using structural netlist comparison (2022-11-22),
3. 11480993 - Methods for optimizing circuit performance via configurable clock skews (2022-10-25),
4. 11381243 - Integrated circuit applications using partial reconfiguration (2022-07-05),
5. 10969820 - Methods for optimizing circuit performance via configurable clock skews (2021-04-06),
6. 10374609 - Integrated circuit applications using partial reconfiguration (2019-08-06),
7. 10275557 - Method and apparatus for performing incremental compilation using structural netlist comparison (2019-04-30),
8. 10242146 - Method and apparatus for placing and routing partial reconfiguration modules (2019-03-26),
9. 10175734 - Techniques for adjusting latency of a clock signal to affect supply voltage (2019-01-08),
10. 10037048 - Methods for optimizing circuit performance via configurable clock skews (2018-07-31),
11. 9602106 - Methods for optimizing circuit performance via configurable clock skews (2017-03-21),
12. 9584129 - Integrated circuit applications using partial reconfiguration (2017-02-28),
13. 9361421 - Method and apparatus for placing and routing partial reconfiguration modules (2016-06-07),
14. 9183336 - Automatic asynchronous signal pipelining (2015-11-10),
15. 8832627 - Automatic asynchronous signal pipelining (2014-09-09),

Title: Mark Bourgeault: Innovator in Incremental Compilation Technologies

Introduction

Mark Bourgeault, located in Mississauga, CA, is a prolific inventor with a remarkable portfolio comprising 24 patents. His work primarily focuses on innovations in system design and compilation methodologies, significantly contributing to the technology landscape.

Latest Patents

One of Mark's latest patents is centered around a "Method and apparatus for performing incremental compilation using structural netlist comparison." This inventive method enhances the design of systems on target devices by identifying critical portions to preserve, which is achieved through a comparison of structural characteristics with other systems. The design results from the comparison are reused, streamlining the development process and improving efficiency.

Career Highlights

Mark Bourgeault has made significant strides in his career, particularly through his engagements with Altera Corporation, a company renowned for its advancements in programmable logic devices. His innovative solutions in the realm of incremental compilation demonstrate his commitment to enhancing design methodologies.

Collaborations

Throughout his career, Mark has collaborated with esteemed colleagues such as Vaughn Betz and Ryan Fung. These partnerships have fostered an environment of innovation and have led to advancements that benefit both the industry and the academic community.

Conclusion

Mark Bourgeault stands out as a key figure in the field of incremental compilation and system design. With a wealth of patents to his name and a dedication to innovation, he continues to shape the future of technology through his contributions and collaborations. His work not only reflects his expertise but also the importance of teamwork in achieving groundbreaking advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…