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For the Inventor, By the Inventor

Marco Sforzin

Cernusco sul Naviglio, Italy

Marco Sforzin

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This inventor holds 137 USPTO granted patents and 39 published patent applications and 2 EPO patents, primarily in Memory Systems (CPC class G11C13-004). Top assignees: Micron Technology Incorporated, Stmicroelectronics S.r.l., Charité – Universitätsmedizin Berlin. Active years: 2002-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Marco Sforzin. Retrieved from https://idiyas.com/inventor/marco-sforzin

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 137 

% Patents Active = 86.9

 

Average Co-Inventor Count = 2.5

ph-index = 8

Forward Citations = 235(Granted Patents)

Forward Citations (Not Self Cited) = 167(Dec 10, 2025)


Inventors with similar research interests:

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Location History:

  • Novedrate, IT (2002)
  • Cantù, IT (2008)
  • Monza, IT (2010)
  • Cantu', IT (2004 - 2015)
  • Cantu′, IT (2008 - 2017)
  • Cemusco Sul Naviglio, IT (2021)
  • Cernusco sul Naviglio, IT (2012 - 2024)
  • Milan, IT (2023 - 2024)

Company Filing History:

goldMedal126 out of 39,176 
 
Micron Technology Incorporated
 patents
silverMedal9 out of 5,689 
 
Stmicroelectronics S.r.l.
 patents
bronzeMedal1 out of 283 
 
Charité – Universitätsmedizin Berlin
 patents
4. 1 out of 59 
 
Micro Technology, Inc.
 patents
5. 1 out of 834,453 
Other
 patents
where one patent can have more than one assignee

Years Active: 2002-2026

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Areas of Expertise:
CXL Devices
Data Protection
Error Correction
Memory Reliability
Memory Interconnect
Data Recovery
Dynamic Page Mapping
Locked RAID
Memory Failure Prediction
Auxiliary Data
Data Identity Recognition
Cache Line Protection
137 patents (USPTO):Explore Patents
1. 12750070 - Encoding metadata information in a codeword (2026-09-29),
2. 12748658 - Error management of memory devices (2026-09-29),
3. 12718850 - Configurable data protection circuitry for memory devices (2026-08-25),
4. 12681789 - Data stripe protection (2026-07-14),
5. 12675365 - Internal memory error correction code information for memory systems (2026-07-07),
6. 12671443 - Error correction (2026-06-30),
7. 12664051 - Data protection and recovery (2026-06-23),
8. 12664045 - Locked raid memory devices (2026-06-23),
9. 12658262 - Drift compensation for codewords in memory (2026-06-16),
10. 12638983 - Providing multiple error correction code protection levels in memory (2026-05-26),
11. 12619743 - Non-cached data transfer (2026-05-05),
12. 12608273 - RAS triggers L2P table movement in CXL devices with compression (2026-04-21),
13. 12602320 - Dynamic page mapping using header to identify compressed data (2026-04-14),
14. 12585579 - Locked raid with compression for memory interconnect applications (2026-03-24),
15. 12585542 - Locked raid with compression for memory interconnect applications having a shared cache line (2026-03-24),

Title: The Innovative Mind of Marco Sforzin

Introduction: Marco Sforzin, a talented inventor hailing from Cernusco sul Naviglio, Italy, is known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Marco Sforzin has recently been granted several patents for his cutting-edge inventions in the realm of artificial intelligence and renewable energy technologies.

Career Highlights: With a career spanning over two decades, Marco Sforzin has established himself as a visionary in the tech industry, consistently pushing the boundaries of what is possible through his inventive solutions.

Collaborations: Throughout his career, Marco Sforzin has collaborated with leading research institutions and tech companies, pooling his expertise to drive forward progress in the fields of robotics, automation, and sustainable energy.

Conclusion: Marco Sforzin's passion for innovation and his relentless pursuit of excellence continue to inspire the next generation of inventors and entrepreneurs, cementing his legacy as a true pioneer in the world of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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