Location History:
- Bengaluru, IN (2015 - 2017)
- Mountain View, CA (US) (2018)
- Karnataka, IN (2018)
Company Filing History:
Years Active: 2015-2025
Title: Mahantesh D Narwade: Innovator in Integrated Circuit Design
Introduction
Mahantesh D Narwade is a prominent inventor based in Bengaluru, India. He has made significant contributions to the field of integrated circuit design, holding a total of 6 patents. His work focuses on enhancing the efficiency and robustness of circuit verification processes.
Latest Patents
Among his latest patents is a method for generating a reduced block model view on-the-fly. This innovation involves loading a word-level design model into memory and creating a masking layer that includes objects not utilized by an IC design analysis system. This masking layer is then employed to provide a reduced block model view on-the-fly to the IC design analysis system. Another notable patent addresses clock-domain-crossing specific design mutations to model silicon behavior and measure verification robustness. This patent describes methods and apparatuses for identifying CDC signal paths in a circuit design and adding design mutations to the associated synchronization circuitry. These mutations are used during functional verification to assess the robustness of a circuit verification test suite.
Career Highlights
Mahantesh currently works at Synopsys, Inc., a leading company in electronic design automation. His role involves developing innovative solutions that improve the design and verification of integrated circuits. His expertise in this area has made him a valuable asset to his team and the industry.
Collaborations
He collaborates with talented professionals such as Rajarshi Mukherjee and Kaushik De, contributing to a dynamic work environment that fosters innovation and creativity.
Conclusion
Mahantesh D Narwade's contributions to integrated circuit design through his patents and work at Synopsys, Inc. highlight his role as a key innovator in the field. His advancements continue to influence the efficiency and effectiveness of circuit design and verification processes.