Madhav Desai

Title: Madhav Desai: Innovator in Integrated Circuit Technology

Introduction

Madhav Desai is a notable inventor based in Powai, India. He has made significant contributions to the field of integrated circuit technology. His innovative work has led to the development of a patent that addresses critical challenges in estimating parasitic capacitance.

Latest Patents

Madhav Desai holds a patent titled "Method and apparatus for estimating parasitic capacitance." This invention provides a system for estimating parasitic capacitance for an integrated circuit. During operation, the system reads a technology file that describes the composition of a vertical cross-section of the integrated circuit. Next, the system reads a design file that specifies the layout of the integrated circuit. The system then identifies a set of dielectric configurations based on information contained in the technology file. It computes Green's function for each of these configurations and estimates parasitic capacitance using information from the design file and the set of Green's functions. He has 1 patent to his name.

Career Highlights

Madhav Desai is currently employed at Synopsys, Inc., a leading company in electronic design automation. His work at Synopsys has allowed him to further his research and development in integrated circuit technologies. His contributions have been instrumental in advancing the capabilities of electronic design tools.

Collaborations

Madhav has collaborated with several talented individuals in his field, including Shabbir Husain Batterywala and Narendra V Shenoy. These collaborations have enriched his work and contributed to the success of various projects.

Conclusion

Madhav Desai is a prominent figure in the realm of integrated circuit technology, with a focus on estimating parasitic capacitance. His innovative patent and contributions to Synopsys, Inc. highlight his commitment to advancing technology in this critical area.