The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 21, 2007

Filed:

Sep. 07, 2004
Applicants:

Shabbir H. Batterywala, Bangalore, IN;

Narendra Shenoy, Cupertino, CA (US);

Madhav Desai, Powai Mumbai, IN;

Inventors:

Shabbir H. Batterywala, Bangalore, IN;

Narendra Shenoy, Cupertino, CA (US);

Madhav Desai, Powai Mumbai, IN;

Assignee:

Synopsys, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/45 (2006.01); G06F 17/10 (2006.01); G06G 7/56 (2006.01);
U.S. Cl.
CPC ...
Abstract

One embodiment of the present invention provides a system for estimating parasitic capacitance for an integrated circuit. During operation, the system reads a technology file, which describes the composition of a vertical cross-section of the integrated circuit. Next, the system reads a design file, which specifies the layout of the integrated circuit. The system then identifies a set of dielectric configurations based on information contained in the technology file. It then computes Green's function for each of these configurations. Next, the system estimates a parasitic capacitance using information contained in the design file and using the set of Green's functions.


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