Hsinchu, Taiwan

Li-Cheng Hu

This inventor holds 1 USPTO granted patent and 3 published patent applications. Top assignee: Taiwan Semiconductor Manufacturing Co., Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Li-Cheng Hu. Retrieved from https://idiyas.com/inventor/li-cheng-hu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Innovations by Li-Cheng Hu in Integrated Circuit Technology

Introduction

Li-Cheng Hu is a notable inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of integrated circuit technology. His work focuses on enhancing the reliability and performance of integrated circuit packages.

Latest Patents

Li-Cheng Hu holds a patent for "Integrated circuit packages and methods of forming the same." This patent includes a crack stopper structure surrounding an embedded integrated circuit die, which is crucial for preventing damage. The structure consists of multiple layers separated by a fill layer, with some sublayers providing adhesion, hardness buffering, and material gradients for effective transitions between layers.

Career Highlights

Li-Cheng Hu is associated with Taiwan Semiconductor Manufacturing Co., Ltd., a leading company in the semiconductor industry. His innovative approaches have contributed to advancements in integrated circuit packaging.

Collaborations

Li-Cheng Hu has worked alongside talented colleagues, including Der-Chyang Yeh and Kuo-Chiang Ting. Their collaborative efforts have furthered research and development in the semiconductor field.

Conclusion

Li-Cheng Hu's contributions to integrated circuit technology exemplify the importance of innovation in the semiconductor industry. His patent reflects a commitment to enhancing the durability and functionality of integrated circuits.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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