South Pasadena, CA, United States of America

Lap-Wai Chow

USPTO Granted Patents = 41 (Patent Applications = 1)

Average Co-Inventor Count = 3.1

ph-index = 17

Forward Citations = 1,084(Granted Patents)

Location History:

So. Pasadena, CA (US) (1999)
Monterey Park, CA (US) (1999 - 2003)
South Pasadena, CA (US) (1996 - 2014)

Company Filing History:

33 out of 2,068

Hrl Laboratories, LLC

Hughes Electronics Corporation

Hughes Aircraft Company

where one patent can have more than one assignee

Years Active: 1996-2014

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41 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 8679908 - Use of silicide block process to camouflage a false transistor (2014-03-25),

2. 8524553 - Integrated circuit modification using well implants (2013-09-03),

3. 8296577 - Cryptographic bus architecture for the prevention of differential power analysis (2012-10-23),

4. 8258583 - Conductive channel pseudo block process and circuit to inhibit reverse engineering (2012-09-04),

5. 8095993 - Cryptographic architecture with instruction masking and other techniques for thwarting differential power analysis (2012-01-10),

6. 8065532 - Cryptographic architecture with random instruction masking to thwart differential power analysis (2011-11-22),

7. 8049281 - Symmetric non-intrusive and covert technique to render a transistor permanently non-operable (2011-11-01),

8. 7949883 - Cryptographic CPU architecture with random instruction masking to thwart differential power analysis (2011-05-24),

9. 7935603 - Symmetric non-intrusive and covert technique to render a transistor permanently non-operable (2011-05-03),

10. 7888213 - Conductive channel pseudo block process and circuit to inhibit reverse engineering (2011-02-15),

11. 7541266 - Covert transformation of transistor properties as a circuit protection method (2009-06-02),

12. 7514755 - Integrated circuit modification using well implants (2009-04-07),

13. 7344932 - Use of silicon block process step to camouflage a false transistor (2008-03-18),

14. 7294935 - Integrated circuits protected against reverse engineering and method for fabricating the same using an apparent metal contact line terminating on field oxide (2007-11-13),

15. 7242063 - Symmetric non-intrusive and covert technique to render a transistor permanently non-operable (2007-07-10),

Title: The Innovative Contributions of Lap-Wai Chow

Introduction: Lap-Wai Chow, an accomplished inventor based in South Pasadena, California, has made significant strides in the field of integrated circuits, holding a total of 41 patents to his name. His inventive initiatives showcase advanced methods for camouflaging integrated circuit structures, contributing to enhanced technological applications.

Latest Patents: Among his recent patents, two stand out for their innovative approaches. The first, titled "Use of Silicide Block Process to Camouflage a False Transistor," introduces a technique that utilizes a layer of conductive material with a controlled outline to create artifact edges that mimic an operable device, even when it is not functional. The second patent, "Integrated Circuit Modification Using Well Implants," discusses a method where an integrated circuit structure is configured to form a well of a first conductivity type beneath the gate region, providing an electrical connection among active regions, irrespective of the voltage applied.

Career Highlights: Throughout his career, Lap-Wai Chow has lent his expertise to notable institutions, including HRL Laboratories, LLC and Raytheon Company. His work has consistently pushed the boundaries of what is possible in integrated circuit design, making substantial contributions to the field and enhancing the technology landscape.

Collaborations: Chow has collaborated with esteemed professionals in the industry, including colleagues William M. Clark, Jr. and James Peter Baukus. These collaborations have played a crucial role in fostering innovation and advancing research in integrated circuit technologies.

Conclusion: Lap-Wai Chow’s innovative spirit and dedication to advancing integrated circuits through his numerous patents have established him as a significant contributor in the technology sector. His recent work reflects a continuous pursuit of excellence and a commitment to developing cutting-edge solutions that address complex challenges in the field of electronics.

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1 patent pending:

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