Lan-Ting Huang

Title: Lan-Ting Huang: Memory Technology Inventor

Introduction

Lan-Ting Huang is an inventor associated with Hsinchu, Taiwan, and Macronix International Co., Ltd. Her patent work includes methods for erasing non-volatile memory and structures designed to isolate memory cells from leakage current. The supplied information lists 3 patents.

Latest Patents

“Erase Operation for Use in Non-Volatile Memory” describes a sector erase method for a non-volatile memory, such as FLASH memory. The method applies successive erase pulses, increasing their voltage magnitude or pulse width until erasure of a sector is verified. It records information about the erase conditions, including how many pulses were needed, and uses that information to determine the first erase pulse for a subsequent sector. If that pulse does not erase the next sector, it may be incremented.

“Memory Array Including Isolation Between Memory Cell and Dummy Cell Portions” describes a semiconductor memory structure with an isolation region along the edge of a memory-cell portion next to a dummy-cell portion. The isolation region helps protect the memory cells from leakage current generated in the dummy-cell portion.

Career Highlights

Huang’s listed patent contributions address memory-device operation and design. One focuses on adapting erase pulses based on recorded sector conditions, while the other concerns isolating memory cells from leakage current.

Collaborations

The supplied information identifies Chen-Chin Liu and Ken-Hui Chen as Huang’s coworkers. It does not specify their roles in the listed patents.

Conclusion

Lan-Ting Huang’s listed work at Macronix International Co., Ltd. reflects contributions to non-volatile memory erasure methods and memory-array isolation structures.