Hsinchu, Taiwan

Kuo-Rung Hsiao

This inventor holds 2 USPTO granted patents. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2006-2008.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kuo-Rung Hsiao. Retrieved from https://idiyas.com/inventor/kuo-rung-hsiao

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 3(Granted Patents)


Company Filing History:


Years Active: 2006-2008

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2 patents (USPTO):Explore Patents

Title: Kuo-Rung Hsiao: Innovator in Semiconductor Process Automation

Introduction

Kuo-Rung Hsiao is a notable inventor based in Hsinchu, Taiwan, with expertise in semiconductor manufacturing technologies. With a total of two patents to his name, Hsiao has made significant contributions to the field that enhance product characterization and fault detection in semiconductor processes.

Latest Patents

Among Kuo-Rung Hsiao's latest patents is the development of a "Method and System for Merging Wafer Test Results." This innovative system effectively integrates product characterization information with characterized products through a merging rule database and a product characterization database. The merging processor operates by receiving product characterization information alongside merging criteria to generate a characterization information result. This result is produced by extracting a trigger merging rule from the merging rule database, ensuring that if products lack characterizations that meet the merging criteria, union maps and intersection maps for the characterized product are created.

Another significant patent is the "Fuzzy Reasoning Model for Semiconductor Process Fault Detection Using Wafer Acceptance Test Data." This system and method identifies suspicious process faults by determining relationships between wafer acceptance test (WAT) parameters and manufacturing process steps. By assessing the impact of failed process steps on WAT parameters, the system can detect potential faults efficiently. Additionally, Kuo-Rung Hsiao's approach includes the application of negative inferences to evaluate the degree of suspiciousness, leading to a comprehensive assessment of potential process failures.

Career Highlights

Kuo-Rung Hsiao works as an inventor at Taiwan Semiconductor Manufacturing Company Limited, a prominent leader in the semiconductor industry known for its cutting-edge technology and innovative solutions. His work focuses on enhancing efficiency and reliability in semiconductor manufacturing processes. Throughout his career, Hsiao has consistently demonstrated a commitment to technological advancement and innovation.

Collaborations

Hsiao has collaborated with esteemed colleagues, including Shuo-Huei Lin and Ruenn-Sheng Peng. These partnerships have proven invaluable in driving innovative solutions and addressing complex challenges in semiconductor technology.

Conclusion

Kuo-Rung Hsiao stands out as a significant contributor to semiconductor innovations, with patents that underscore his dedication to improving manufacturing processes. His work not only enhances product quality and operational efficiency but also paves the way for future advancements in the semiconductor industry. As technology evolves, the impact of Hsiao's inventions is likely to resonate within the field for years to come.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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