Taipei, Taiwan

Kuan-Te Wu

This inventor holds 2 USPTO granted patents. Top assignee: Industrial Technology Research Institute. Active years: 2017-2019.


% Patents Active = 100.0

Average Co-Inventor Count = 4.8

ph-index = 2

Forward Citations = 4(Granted Patents)


Company Filing History:


Years Active: 2017-2019

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2 patents (USPTO):Explore Patents

Title: Kuan-Te Wu: Innovator in Memory Control Circuits

Introduction

Kuan-Te Wu is a prominent inventor based in Taipei, Taiwan. He has made significant contributions to the field of memory technology, holding a total of 2 patents. His work focuses on enhancing memory control circuits and fault-tolerance mechanisms in memory systems.

Latest Patents

Wu's latest patents include a "Memory Control Circuit and Memory Test Method" and a "Fault-Tolerance Through Silicon Via Interface and Controlling Method Thereof." The memory control circuit patent describes a system that integrates multiple channel controllers with a built-in self-test (BIST) circuit. This innovation allows for efficient testing and control of multi-channel memory systems. The fault-tolerance TSV interface patent addresses the challenges of data access in three-dimensional random access memory (3-D RAM) by providing multiple fault-tolerance access configurations, ensuring reliability in memory operations.

Career Highlights

Kuan-Te Wu is affiliated with the Industrial Technology Research Institute, where he continues to advance research in memory technologies. His expertise in memory control and fault tolerance has positioned him as a key figure in the development of innovative solutions in this domain.

Collaborations

Wu has collaborated with notable colleagues, including Jin-Fu Li and Chih-Yen Lo, contributing to various research projects and innovations in memory technology.

Conclusion

Kuan-Te Wu's contributions to memory technology through his patents and research at the Industrial Technology Research Institute highlight his role as an influential inventor in the field. His work continues to pave the way for advancements in memory systems and their applications.

Profile summary based on public USPTO records.
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