The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2019

Filed:

May. 17, 2017
Applicant:

Industrial Technology Research Institute, Hsinchu, TW;

Inventors:

Kuan-Te Wu, New Taipei, TW;

Jenn-Shiang Lai, Hsinchu, TW;

Chih-Yen Lo, Hsinchu, TW;

Jin-Fu Li, Taoyuan, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/24 (2006.01); G11C 29/36 (2006.01); G06F 13/00 (2006.01); G11C 29/14 (2006.01); G11C 29/16 (2006.01);
U.S. Cl.
CPC ...
G11C 29/14 (2013.01); G11C 29/16 (2013.01); G11C 29/36 (2013.01);
Abstract

A memory control circuit, coupled to a multi-channel memory, includes a plurality of channel controllers coupled to respective channel memories of the multi-channel memory, and a built-in self-test (BIST) circuit. The BIST circuit includes a BIST controller and a plurality of command index registers which store respective command indexes related to the channel controllers. The BIST controller receives notification from at least two channel controllers of the channel controllers, which indicates that the at least two channel controllers complete respective current test commands. When the BIST controller arbitrates, the BIST controller selects at least a channel controller from the at least two channel controllers which send the notification, and sends respective next test command(s) to the selected at least one channel controller based on the respective command index(es) of the selected at least one channel controller.


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