Hyogo, Japan

Kiyoshi Adachi

This inventor holds 6 USPTO granted patents. Top assignees: Mitsubishi Denki Kabushiki Kaisha, Renesas Technology Corp.. Active years: 1994-2005.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kiyoshi Adachi. Retrieved from https://idiyas.com/inventor/kiyoshi-adachi-mk2tm4yl

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 66.7

Average Co-Inventor Count = 1.4

ph-index = 4

Forward Citations = 48(Granted Patents)


Location History:

  • Itami, JP (1996)
  • Tokyo, JP (2002)
  • Hyogo, JP (1994 - 2005)

Company Filing History:


Years Active: 1994-2005

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6 patents (USPTO):Explore Patents

Title: Kiyoshi Adachi: Innovator in Semiconductor Technology

Introduction

Kiyoshi Adachi is a prominent inventor based in Hyogo, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 6 patents. His innovative work has paved the way for advancements in electronic devices and memory systems.

Latest Patents

One of Kiyoshi Adachi's latest patents is a semiconductor device capable of accurately producing an internal multi-phase clock signal. This invention involves applying an operation control signal for an oscillator that produces an internal clock signal phase-locked with a basic clock signal. The second internal clock generating circuit produces a control signal that adjusts the phase and/or frequency difference between a synchronization target signal and a second internal clock signal. This allows for the accurate and stable generation of multiple internal clock signals with different phases and/or frequencies.

Another notable patent is related to semiconductor memory and its test method. This invention includes a test memory cell block and a test memory cell selector. The test memory cell block consists of multiple memory cells that store opposite bit values in adjacent cells. The test memory cell selector varies the potential of precharged bit lines by asserting one of the word lines, allowing for the selection of a memory cell to be tested. This innovation addresses the challenges faced by conventional semiconductor memory in testing circuits designed to suppress interference between adjacent bit lines.

Career Highlights

Kiyoshi Adachi has worked with several notable companies throughout his career, including Mitsubishi Electric Corporation and Renesas Technology Corporation. His experience in these organizations has contributed to his expertise in semiconductor technology and innovation.

Collaborations

Throughout his career, Kiyoshi Adachi has collaborated with talented individuals such as Takashi Utsumi and Koji Nasu. These collaborations have further enriched his work and contributed to the development of groundbreaking technologies.

Conclusion

Kiyoshi Adachi's contributions to semiconductor technology through his patents and collaborations highlight his role as an influential inventor. His work continues to impact the field and inspire future innovations in electronic devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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