Semiconductor device capable of accurately producing internal multi-phase clock signal

Abstract

An operation control signal for an oscillator producing an internal clock signal phase-locked with a basic clock signal is applied to a second internal clock generating circuit. In the second internal clock generating circuit, with reference to the applied operation control signal, a control signal adjusting a phase and/or frequency difference between a synchronization target signal and a second internal clock signal is produced to adjust a phase and/or frequency of the second internal clock signal. A plurality of internal clock signals different in phase and/or frequency can be generated accurately and stably.