Hampton, NH, United States of America

Kevin Richard Verrier

This inventor holds 2 USPTO granted patents and 2 published patent applications. Top assignee: Applied Materials, Inc.. Active years: 2023-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kevin Richard Verrier. Retrieved from https://idiyas.com/inventor/kevin-richard-verrier

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 2 

% Patents Active = 100.0

Average Co-Inventor Count = 2.4

ph-index = 1


Company Filing History:


Years Active: 2023-2026

Loading Chart...
2 patents (USPTO):Explore Patents

Title: Kevin Richard Verrier: Semiconductor Processing Inventor

Introduction

Kevin Richard Verrier is an inventor based in Hampton, New Hampshire, whose patent work addresses semiconductor manufacturing and wafer processing. He is associated with Applied Materials, Inc. His portfolio includes 2 patents.

Latest Patents

Verrier’s listed patents focus on controlling electrical charge, temperature, and etch uniformity during semiconductor processing.

“Electrostatic Clamp Having Charge Control Assembly” describes an electrostatic clamp with a conductive base and a ceramic body containing an electrode assembly. A separate conductive charge-control structure extends through the base to the ceramic body’s outer surface, providing a way to manage charge while remaining isolated from the electrode assembly.

“Temperature Controlled/Electrically Biased Wafer Surround” concerns a workpiece holder that scans a wafer through a ribbon ion beam. The holder includes a surrounding portion, or halo, that can be heated independently and, in some embodiments, electrically biased separately from the wafer. The halo may also be divided into independently controlled thermal zones to help address etch-rate nonuniformities.

Career Highlights

Verrier’s patent contributions reflect work on practical challenges in semiconductor fabrication, including electrostatic clamping and uniform etching. The inventions describe approaches for controlling conditions at and around a wafer during processing.

Collaborations

Verrier’s listed coworkers include Simon Ruffell and Vijay D. Parkhe. His work is associated with Applied Materials, Inc., a company active in semiconductor manufacturing equipment and technologies.

Conclusion

Kevin Richard Verrier’s two listed patents highlight innovations in charge control and wafer-surround temperature and bias management, with the shared aim of supporting more controlled semiconductor processing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…