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Kanagawa, Japan

Keishi Sakanushi

This inventor holds 3 USPTO granted patents. Top assignee: Kabushiki Kaisha Toshiba. Active years: 2015.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Keishi Sakanushi. Retrieved from https://idiyas.com/inventor/keishi-sakanushi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 3

% Patents Active = 100.0

Average Co-Inventor Count = 1.3

ph-index = 2

Forward Citations = 16(Granted Patents)

Location History:

Kanagawa-ken, JP (2015)
Fujisawa, JP (2015)

Company Filing History:

3 out of 53,286

Kabushiki Kaisha Toshiba

Years Active: 2015

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3 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 9190150 - Non-volatile memory device having 3D memory cell array with improved wordline and contact layout (2015-11-17),

2. 9158878 - Method and apparatus for generating circuit layout using design model and specification (2015-10-13),

3. 8972907 - Layout correcting method, recording medium and design layout correcting apparatus (2015-03-03),

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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