The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2015

Filed:

Jan. 23, 2014
Applicant:

Kabushiki Kaisha Toshiba, Minato-ku, JP;

Inventor:

Keishi Sakanushi, Kanagawa-ken, JP;

Assignee:

Kabushiki Kaisha Toshiba, Minato-ku, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G03F 1/00 (2012.01);
U.S. Cl.
CPC ...
G06F 17/5072 (2013.01); G03F 1/00 (2013.01); G06F 17/5068 (2013.01);
Abstract

According to one embodiment, a method is disclosed for designing an integrated circuit by a computer including an input unit, a memory unit, a calculating unit, and an output unit. The method can include storing a design model in the memory unit. The design model has parameters of physical quantities of active elements, passive elements, and an interconnection pattern included in the integrated circuit. The design model has an algorithm generating a circuit layout from values of the parameters. The method can include inputting the values of the parameters based on a first design specification of the integrated circuit by the input unit, generating a first circuit layout of the active elements, the passive elements, and the interconnection pattern by the calculating unit using the design model from the values of the parameters received by the input unit, and outputting the first circuit layout by the output unit.


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