Sendai, Japan

Kangwook Lee

This inventor holds 1 USPTO granted patent. Top assignees: Tohoku University, Tokyo Electron Limited. Active years: 2020.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kangwook Lee. Retrieved from https://idiyas.com/inventor/kangwook-lee-3byzubjj

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 5.0

ph-index = 1


Company Filing History:


Years Active: 2020

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1 patent (USPTO):Explore Patents

Title: The Innovative Contributions of Kangwook Lee

Introduction

Kangwook Lee is a notable inventor based in Sendai, Japan. He has made significant contributions to the field of technology, particularly in the area of chip component alignment. His innovative approach has led to the development of a unique method that enhances the precision of chip placement on substrates.

Latest Patents

Kangwook Lee holds a patent for a method that aligns chip components relative to a substrate using liquid. This method involves supplying a liquid to a substrate, on which a chip component is arranged. The substrate features a rectangular mounting region, and the chip component has a second surface that matches the shape and area of this region. The design includes regions with varying wettability, allowing for improved alignment and placement accuracy.

Career Highlights

Throughout his career, Kangwook Lee has worked with prominent organizations such as Tokyo Electron Limited and Tohoku University. His experience in these institutions has allowed him to refine his skills and contribute to advancements in technology.

Collaborations

Kangwook Lee has collaborated with esteemed colleagues, including Shinya Kikuta and Satohiko Hoshino. These partnerships have fostered an environment of innovation and have led to the successful development of his patented methods.

Conclusion

Kangwook Lee's contributions to the field of technology, particularly through his innovative patent, demonstrate his commitment to advancing chip component alignment techniques. His work continues to influence the industry and inspire future innovations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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