Hefei, China

Kai Cao

This inventor holds 3 USPTO granted patents. Top assignee: Changxin Memory Technologies, Inc.. Active years: 2024-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Kai Cao. Retrieved from https://idiyas.com/inventor/kai-cao-f1e0q7bt

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 1.8

ph-index = 1


Company Filing History:


Years Active: 2024-2025

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3 patents (USPTO):Explore Patents

Title: Innovations of Inventor Kai Cao

Introduction

Kai Cao is a notable inventor based in Hefei, China. He has made significant contributions to the field of semiconductor technology. With a total of 3 patents to his name, his work focuses on advanced methods for manufacturing semiconductor structures.

Latest Patents

Kai Cao's latest patents include a "Method of manufacturing semiconductor structure" and "Semiconductor structure and method for forming semiconductor structure." The first patent outlines a method that involves providing an initial laminated structure with capacitor holes, forming a hard mask layer, and etching the hard mask layer using specific gases to prevent unwanted reactions. The second patent describes a method for forming a semiconductor structure that includes creating dielectric layers and mask patterns to etch openings in a precise manner.

Career Highlights

Kai Cao is currently employed at Changxin Memory Technologies, Inc., where he applies his expertise in semiconductor manufacturing. His innovative approaches have contributed to advancements in the industry, enhancing the efficiency and effectiveness of semiconductor production.

Collaborations

Some of his coworkers include Bo Yang and Juncai Li, who collaborate with him on various projects within the company.

Conclusion

Kai Cao's work in semiconductor technology exemplifies the spirit of innovation and dedication to advancing the field. His patents reflect a commitment to improving manufacturing processes and contribute to the ongoing evolution of semiconductor structures.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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