Justin Reyes

Title: Justin Reyes: Inventor in Semiconductor Chiplet Routing

Introduction

Justin Reyes is an inventor based in San Jose, California, and is associated with Intel Corporation. His patent work addresses communication between chiplets, which are separate components integrated into a larger semiconductor system.

Latest Patents

The provided information lists one patent associated with Reyes: “Inter-chiplet routing of transactions across multi-heterogeneous chiplets using hierarchical addressing.” The invention describes a system in which messages carry hierarchical destination identifiers: one portion identifies the destination chiplet, and another identifies the destination agent on that chiplet. A fabric adapter directs messages to a die-to-die bridge when the destination is on another chiplet, enabling communications to be routed across the system. The patent record provided does not establish when this patent was granted or whether it is his latest filing.

Career Highlights

Reyes’s listed patent reflects work on routing transactions across heterogeneous chiplet architectures. The disclosed approach uses destination addressing and fabric adapters to help direct communications between agents located on different chiplets. The supplied information associates him with 1 patent and Intel Corporation.

Collaborations

Ramadass Nagarajan is identified as Reyes’s coworker. The information provided does not specify whether Nagarajan collaborated on the patent or describe their particular roles.

Conclusion

Justin Reyes’s listed invention focuses on hierarchical addressing for routing messages across chiplets, highlighting a technical contribution to semiconductor interconnect design.