Kazo, Japan

Junichi Kanai

This inventor holds 3 USPTO granted patents. Top assignee: Adv Antest Corporation. Active years: 1993-1999.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Junichi Kanai. Retrieved from https://idiyas.com/inventor/junichi-kanai-e034jaby

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 1.4

ph-index = 2

Forward Citations = 41(Granted Patents)


Location History:

  • Hanyu, JP (1993)
  • Kazo, JP (1997 - 1999)

Company Filing History:


Years Active: 1993-1999

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3 patents (USPTO):Explore Patents

Title: Junichi Kanai: Innovator in Semiconductor Testing Technology

Introduction

Junichi Kanai is a notable inventor based in Kazo, Japan. He has made significant contributions to the field of semiconductor testing, holding a total of 3 patents. His work focuses on enhancing the efficiency and accuracy of semiconductor memory testing.

Latest Patents

Kanai's latest patents include a semiconductor testing device with a rewrite controller and an apparatus for concurrently testing a plurality of semiconductor memories. In his innovative design, a test data pattern, an address pattern, and a control signal are supplied from a pattern generator to a test memory. Data read from the test memory is compared with expected data using an XOR gate. When the data matches, a compared result indicating a pass is output. Conversely, if there is a mismatch, a fail result is generated. A match signal detected by the XOR gate is held in a register, which then outputs an inhibition signal to the test memory's inhibition gate. This process inhibits the write enable signal from being supplied to the test memory, preventing excessive writing.

Career Highlights

Kanai is currently employed at Adv Antest Corporation, where he continues to develop innovative solutions in semiconductor testing. His expertise in this area has positioned him as a key figure in advancing testing technologies.

Collaborations

Throughout his career, Kanai has collaborated with talented individuals such as Shinichi Kobayashi and Toshimi Ohsawa. These collaborations have further enriched his work and contributed to the success of various projects.

Conclusion

Junichi Kanai's contributions to semiconductor testing technology demonstrate his innovative spirit and commitment to advancing the field. His patents reflect a deep understanding of the complexities involved in semiconductor memory testing, making him a valuable asset in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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