Jung-Lieh Hsu

Title: Jung-Lieh Hsu: Innovator in Semiconductor Technology

Introduction

Jung-Lieh Hsu is a notable inventor based in Tainan, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly in the area of solder bump formation processes. His innovative methods have the potential to enhance the reliability and performance of semiconductor devices.

Latest Patents

Jung-Lieh Hsu holds a patent for a "Method to prevent passivation layer peeling in a solder bump formation process." This patent addresses the issue of peeling in cross-linked polymer passivation layers during the solder bump formation. The method involves providing a multi-level semiconductor device on a process wafer, forming a layer of resinous precursor polymeric material, and subjecting the wafer to specific thermal treatments to create a robust passivation layer.

Career Highlights

Hsu is associated with Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. His work focuses on improving manufacturing processes and enhancing the quality of semiconductor devices. With a patent portfolio that includes one patent, Hsu continues to contribute to advancements in technology.

Collaborations

Jung-Lieh Hsu has collaborated with notable colleagues such as Kuei-Yuam Hsu and Chu-Wei Hu. These collaborations have fostered innovation and development in semiconductor technologies.

Conclusion

Jung-Lieh Hsu is a prominent figure in the semiconductor industry, recognized for his innovative methods that improve solder bump formation processes. His contributions are vital for the advancement of semiconductor technology and its applications.