Higashihiroshima, Japan

Jun Ho Lee

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Micron Technology Incorporated. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jun Ho Lee. Retrieved from https://idiyas.com/inventor/jun-ho-lee-h96dbz0l

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Jun Ho Lee: Memory Word Line Structure Inventor

Introduction

Jun Ho Lee is an inventor associated with Higashihiroshima, Japan, and Micron Technology Incorporated. His patent work addresses memory-device architecture, particularly the structure of word lines and their oxide films.

Latest Patents

Lee is associated with 1 patent: “Apparatus Including Memory Word Line Structure.” The disclosed apparatus includes a word line array with multiple word lines extending through a memory mat. Two adjacent word lines have a contact on the first word line that is separated from the second word line by a gap. The word lines have a first oxide film in the array’s center area within the memory mat and a thicker second oxide film in the edge area outside the memory mat. This arrangement describes a structural approach to word-line design in a memory device.

Career Highlights

Lee’s listed patent is associated with Micron Technology Incorporated, a company whose work includes memory technologies. The patent focuses on the physical configuration of word lines and oxide films across different areas of a memory array.

Collaborations

Byung Yoon Kim is identified as Lee’s coworker. The provided information does not specify their roles or describe a particular joint project.

Conclusion

Jun Ho Lee’s patent documents an approach to memory word-line structure that distinguishes oxide-film thickness between the center and edge areas of an array.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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