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For the Inventor, By the Inventor

Boise, ID, United States of America

Joseph Thomas Pawlowski

This inventor holds 73 USPTO granted patents and 12 published patent applications and 5 EPO patents, primarily in Memory Systems (CPC class G06F). Top assignees: Micron Technology Incorporated, Lodestar Licensing Group LLC, Other. Active years: 1998-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Joseph Thomas Pawlowski. Retrieved from https://idiyas.com/inventor/joseph-thomas-pawlowski

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 73 

% Patents Active = 94.5

 

Average Co-Inventor Count = 1.2

ph-index = 10

Forward Citations = 446(Granted Patents)

Forward Citations (Not Self Cited) = 386(Dec 10, 2025)


Inventors with similar research interests:


Company Filing History:

goldMedal67 out of 39,176 
 
Micron Technology Incorporated
 patents
silverMedal2 out of 218 
 
Lodestar Licensing Group LLC
 patents
bronzeMedal2 out of 834,453 
Other
 patents
where one patent can have more than one assignee

Years Active: 1998-2025

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Areas of Expertise:
Data Queries
Memory Systems
Erroneous Bit Discovery
Stacked Memory
Cache Management
Wear Leveling
Code Word Structure
Adaptive Cache
Shared Memory Bus
Truth Table Extension
Multi-Port Memory
Media Scrubber
73 patents (USPTO):Explore Patents
1. 12367935 - Acceleration of data queries in memory (2025-07-22),
2. 12353280 - Erroneous bit discovery in memory system (2025-07-08),
3. 12229451 - Truth table extension for stacked memory systems (2025-02-18),
4. 12216906 - Host techniques for stacked memory systems (2025-02-04),
5. 12093129 - Spare substitution in memory system (2024-09-17),
6. 11934705 - Truth table extension for stacked memory systems (2024-03-19),
7. 11907560 - Code word format and structure (2024-02-20),
8. 11886338 - Forwarding code word address (2024-01-30),
9. 11853158 - Erroneous bit discovery in memory system (2023-12-26),
10. 11823742 - Acceleration of data queries in memory (2023-11-21),
11. 11797531 - Acceleration of data queries in memory (2023-10-24),
12. 11783876 - Multi-port storage-class memory interface (2023-10-10),
13. 11775458 - Multiple memory type shared memory bus systems and methods (2023-10-03),
14. 11768770 - Cache memory addressing (2023-09-26),
15. 11727999 - Zone swapping for wear leveling memory (2023-08-15),

Title: Joseph Thomas Pawlowski: Innovator in Memory Systems

Introduction

Joseph Thomas Pawlowski is a prolific inventor based in Boise, ID. With an impressive portfolio of 71 patents, he has made significant contributions to the field of memory systems and computer architecture. His work exemplifies the intersection of innovative technology and advanced computing solutions.

Latest Patents

Among his latest patents is "Truth Table Extension for Stacked Memory Systems." This invention provides techniques for extending a truth table in stacked memory systems. It details a storage system that incorporates a stack of first memory die, along with a logic die that manages various memory requests through a multi-bus interface. Additionally, it allows the logic die to utilize a second memory with faster access times to efficiently handle incoming requests.

Another significant patent from Pawlowski is "Host Techniques for Stacked Memory Systems." This invention focuses on optimizing the operation of memory packages by improving system bandwidth. It describes a setup where a host device communicates with a storage device that contains two types of volatile memory. The host device intelligently sorts commands based on latency information, ensuring high efficiency and utilization of the data interface.

Career Highlights

Pawlowski's career has been marked by his work at Micron Technology Incorporated, a company renowned for its innovations in memory and storage solutions. His contributions while working there have influenced the design and functionality of various memory systems, showcasing his creative problem-solving skills.

Collaborations

Throughout his career, Pawlowski has collaborated with notable engineers and inventors, including David Andrew Roberts and John R. Wilford. These partnerships have fostered an environment of creativity and innovation, leading to breakthroughs in memory technology that have industry-wide applications.

Conclusion

Joseph Thomas Pawlowski stands out as a key figure in the realm of memory system innovations. His extensive patent portfolio reflects his dedication to advancing technology and refining the capabilities of memory systems. Through his work, he continues to pave the way for future advancements in computing and data storage solutions.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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