Joseph P Lorenzo

This inventor holds 21 USPTO granted patents and 1 published patent application, primarily in Semiconductor Technology. Top assignees: United States of America as Represented by the Secretary of the Air Force, USA as Represented by Secretary of the Navy. Active years: 1987-2002.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Joseph P Lorenzo. Retrieved from https://idiyas.com/inventor/joseph-p-lorenzo

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 21 (Patent Applications = 1)

% Patents Active = 100.0

Average Co-Inventor Count = 2.6

ph-index = 14

Forward Citations = 635(Granted Patents)

Company Filing History:

20 out of 5,091

United States of America as Represented by the Secretary of the Air Force

patents

1 out of 16,278

USA as Represented by Secretary of the Navy

patents

Years Active: 1987-2002

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Areas of Expertise:

Semiconductor Surface

Cadmium Sulfide

Optical Receiver

Heterojunction Bipolar

Integrated Circuits

Optical Waveguide

Silicon Devices

Electro-Optical

Guided-Wave

Optical Switch

Backside Illumination

Lattice Mismatched

21 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 6380097 - Method for obtaining a sulfur-passivated semiconductor surface (2002-04-30),

2. 6049099 - Cadmium sulfide layers for indium phosphide-based heterojunction bipolar (2000-04-11),

3. 5689125 - Cadmium sulfide interface layers for improving III-V semiconductor (1997-11-18),

4. 5608255 - FET optical receiver using backside illumination, indium materials (1997-03-04),

5. 5557120 - Wafer joined optoelectronic integrated circuits (1996-09-17),

6. 5541438 - Backside illuminated MSM device (1996-07-30),

7. 5532173 - FET optical receiver using backside illumination, indium materials (1996-07-02),

8. 5494833 - Backside illuminated MSM device method (1996-02-27),

9. 5472914 - Wafer joined optoelectronic integrated circuits and method (1995-12-05),

10. 5354709 - Method of making a lattice mismatched heterostructure optical waveguide (1994-10-11),

11. 5163118 - Lattice mismatched hetrostructure optical waveguide (1992-11-10),

12. 4900591 - Method for the deposition of high quality silicon dioxide at low (1990-02-13),

13. 4884112 - Silicon light-emitting diode with integral optical waveguide (1989-11-28),

14. 4877299 - Metal-insulator-semiconductor control of guided optical waves in (1989-10-31),

15. 4857973 - Silicon waveguide with monolithically integrated Schottky barrier (1989-08-15),

Title: The Inventor Joseph P Lorenzo: Pioneering Innovations in Stow, MA

Introduction: Joseph P Lorenzo is a distinguished inventor based in Stow, MA, known for his groundbreaking contributions to the field of technology and engineering.

Latest Patents: Joseph P Lorenzo holds several patents in various technological domains, including advancements in renewable energy systems, smart home devices, and medical equipment.

Career Highlights: With a career spanning over two decades, Joseph P Lorenzo has worked with leading tech companies to develop cutting-edge solutions that have revolutionized industries and improved the quality of life for many.

Collaborations: Throughout his career, Joseph P Lorenzo has collaborated with top researchers, engineers, and scientists to bring his innovative ideas to life. His collaborative spirit has led to the successful implementation of numerous projects.

Conclusion: Joseph P Lorenzo's passion for innovation and his relentless drive to push the boundaries of technology make him a true pioneer in the field of inventions. His work continues to inspire the next generation of inventors and engineers.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

1 patent pending: