Hwaseong, South Korea

Joong Yun Ra

This inventor holds 2 USPTO granted patents. Top assignee: Samsung Electronics Co., Ltd.. Active years: 2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Joong Yun Ra. Retrieved from https://idiyas.com/inventor/joong-yun-ra

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 6.9

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2019

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2 patents (USPTO):Explore Patents

Title: Joong Yun Ra: Innovator in Semiconductor Technology

Introduction

Joong Yun Ra is a prominent inventor based in Hwaseong, South Korea. He has made significant contributions to the field of semiconductor technology, holding 2 patents that showcase his innovative approaches to device fabrication.

Latest Patents

His latest patents include a "Method for Fabricating Semiconductor Device" and a "Method of Manufacturing Semiconductor Device." The first patent outlines a process that involves forming a mold structure on a substrate, creating a vertical channel structure, and nitriding a continuous film to form a TiN film. The second patent describes a method that includes forming a mold structure with stacked layers, creating side openings, and applying a dielectric layer through heat treatment.

Career Highlights

Joong Yun Ra is currently employed at Samsung Electronics Co., Ltd., where he continues to push the boundaries of semiconductor manufacturing. His work is instrumental in advancing the efficiency and performance of semiconductor devices.

Collaborations

He collaborates with notable colleagues such as Sung Hae Lee and Yong Seok Cho, contributing to a dynamic team focused on innovation in technology.

Conclusion

Joong Yun Ra's contributions to semiconductor technology through his patents and work at Samsung Electronics Co., Ltd. highlight his role as a key innovator in the industry. His advancements are paving the way for future developments in semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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