Seoul, South Korea

Jong-Duk Lee

This inventor holds 4 USPTO granted patents. Top assignees: Samsung Electronics Co., Ltd., Seoul National University. Active years: 2006-2009.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jong-Duk Lee. Retrieved from https://idiyas.com/inventor/jong-duk-lee-pl7giyg0

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 4.4

ph-index = 4

Forward Citations = 70(Granted Patents)


Company Filing History:


Years Active: 2006-2009

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4 patents (USPTO):Explore Patents

Title: Jong-Duk Lee: Innovator in Memory Device Technology

Introduction

Jong-Duk Lee is a prominent inventor based in Seoul, South Korea. He has made significant contributions to the field of memory device technology, holding a total of 4 patents. His work focuses on advanced dynamic random access memory (DRAM) devices and innovative memory structures.

Latest Patents

One of Jong-Duk Lee's latest patents is for a dual-gate dynamic random access memory device featuring vertical channel transistors. This DRAM device incorporates pillar-shaped active patterns that include source regions in contact with a semiconductor substrate, drain regions positioned above the source regions, and channel regions situated between the source and drain regions. The active patterns are organized within a cell array field, with bit lines connecting the drain regions and word lines intersecting the bit lines. Additionally, gate insulation films are placed between the word lines and active patterns.

Another notable patent is for a twin-ONO-type SONOS memory. This memory structure consists of a semiconductor substrate with a source region, a drain region, and a channel region. It features twin silicon oxide-silicon nitride-silicon oxide (ONO) dielectric layers, with the first ONO layer positioned on the channel and source regions, while the second ONO layer is on the channel and drain regions. A control gate is located on the channel region, nestled between the twin ONO dielectric layers.

Career Highlights

Jong-Duk Lee has worked with leading organizations in the technology sector, including Samsung Electronics Co., Ltd. and Seoul National University. His experience in these institutions has allowed him to develop cutting-edge memory technologies that have the potential to revolutionize the industry.

Collaborations

Throughout his career, Jong-Duk Lee has collaborated with notable colleagues such as Byung-Gook Park and Yong-kyu Lee. These partnerships have contributed to the advancement of memory device research and development.

Conclusion

Jong-Duk Lee's innovative work in memory device technology has established him as a key figure in the field. His patents reflect a commitment to advancing the capabilities of memory devices, paving the way for future technological advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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