The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 28, 2006

Filed:

Feb. 20, 2004
Applicants:

Yong-kyu Lee, Suwon, KR;

Jeong-uk Han, Suwon, KR;

Sung-taeg Kang, Seoul, KR;

Jong-duk Lee, Seoul, KR;

Byung-gook Park, Seoul, KR;

Inventors:

Yong-kyu Lee, Suwon, KR;

Jeong-uk Han, Suwon, KR;

Sung-taeg Kang, Seoul, KR;

Jong-duk Lee, Seoul, KR;

Byung-gook Park, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of manufacturing a twin-ONO-type SONOS memory using a reverse self-alignment process, wherein an ONO dielectric layer is formed under a gate and physically separated into two portions using a reverse self-alignment process irrespective of photolithographic limits. To facilitate the reverse self-alignment, a buffer layer and spacers for defining the width of the ONO dielectric layer are adopted. Thus, the dispersion of trapped charges during programming and erasing can be appropriately adjusted, thus improving the characteristics of the SONOS. The present invention prevents the redistribution of charges in time after the programming and erasing operations.


Find Patent Forward Citations

Lee, Yong-kyu. (2006). Method of manufacturing twin-ono-type sonos memory using reverse self-alignment process (U.S. Patent No. 7005349). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7005349

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