John Blake Pavelka

USPTO Granted Patents = 19 (Patent Applications = 1)

Average Co-Inventor Count = 3.0

ph-index = 10

Forward Citations = 439(Granted Patents)

Location History:

Beacon, NY (US) (1993 - 1998)
Plano, TX (US) (2000 - 2001)
Austin, TX (US) (1998 - 2024)

Company Filing History:

9 out of 1,721

Silicon Laboratories Inc.

patents

7 out of 164,108

International Business Machines Corporation

Black Sand Technologies, Inc.

patents

Years Active: 1993-2024

where 'Filed Patents' based on already Granted Patents

19 patents (USPTO):Sort by Forward Citations

Abstract keywords

1. 11887924 - Chip scale package (2024-01-30),

2. 11562952 - Chip scale package (2023-01-24),

3. 9355870 - Integrated circuit with sensor area and resin dam (2016-05-31),

4. 8852513 - Systems and methods for packaging integrated circuit gas sensor systems (2014-10-07),

5. 7990132 - Current sensor including an integrated circuit die including a first and second coil (2011-08-02),

6. 7935990 - RF power amplifier and method for packaging the same (2011-05-03),

7. 7679162 - Integrated current sensor package (2010-03-16),

8. 7362086 - Integrated current sensor (2008-04-22),

9. 7224232 - RF power amplifier and method for packaging the same (2007-05-29),

10. 7209011 - Method and apparatus for synthesizing high-frequency signals for wireless communications (2007-04-24),

11. 6903617 - Method and apparatus for synthesizing high-frequency signals for wireless communications (2005-06-07),

12. 6323735 - Method and apparatus for synthesizing high-frequency signals utilizing on-package oscillator circuit inductors (2001-11-27),

13. 6274214 - Microelectronic package module with temporary lid (2001-08-14),

14. 6054008 - Process for adhesively attaching a temporary lid to a microelectronic (2000-04-25),

15. D407382 - Lid for a microelectronic package (1999-03-30),

Title: John Blake Pavelka: A Pioneer in Chip Scale Packaging

Introduction

John Blake Pavelka is an accomplished inventor based in Austin, TX, recognized for his significant contributions to the field of chip scale packaging. With an impressive portfolio of 19 patents, Pavelka has made remarkable advancements in the technology sector, particularly with his latest innovations in chip scale package designs.

Latest Patents

Pavelka's most recent patents focus on innovative designs for chip scale packages (CSP). His disclosure details a CSP that includes a first set of contact balls or bumps and a second set of contact balls or bumps. Importantly, the design features a channel routing region that is free from any CSP contact balls or bumps, optimizing the overall efficiency and functionality of these packages.

Career Highlights

Throughout his career, John Blake Pavelka has been associated with prominent companies in the tech industry, including Silicon Laboratories Inc. and International Business Machines Corporation (IBM). His work has significantly pushed the boundaries of what is achievable in chip scale packaging technology.

Collaborations

Pavelka has collaborated with talented individuals in the industry, including coworkers Timothy Joseph Dupuis and David R Welland. These collaborations have contributed to his success and have fostered an environment of innovation that enhances the development of new technologies.

Conclusion

John Blake Pavelka stands out as a key figure in the realm of chip scale packaging, with 19 patents to his name that showcase his inventive prowess. His contributions to the industry are not only noteworthy but also serve as a testament to his commitment to advancing technology.

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1 patent pending:

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