The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 24, 2023
Filed:
Apr. 30, 2021
Applicant:
Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;
Inventors:
Craig McAdam, Edinburgh, GB;
Jonathan Taylor, London, GB;
Douglas Macfarlane, Edinburgh, GB;
John Kerr, Edinburgh, GB;
James Munger, Austin, TX (US);
John Pavelka, Austin, TX (US);
Steven A. Atherton, Austin, TX (US);
Assignee:
Cirrus Logic, Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 23/49822 (2013.01); H01L 24/13 (2013.01); H01L 2224/16227 (2013.01);
Abstract
The present disclosure relates to a chip scale package (CSP) comprising: a first set of CSP contact balls or bumps; a second set of CSP contact balls or bumps; and a channel routing region, the channel routing region being devoid of any CSP contact balls or bumps.