Joel R Philips

Title: The Innovations of Joel R. Philips

Introduction

Joel R. Philips is an accomplished inventor based in Oakland, CA. He has made significant contributions to the field of integrated circuit design, particularly in the area of static timing analysis. His work has been recognized through the granting of a patent, showcasing his expertise and innovative approach.

Latest Patents

Joel R. Philips holds a patent for "Constructing equivalent waveform models for static timing analysis of integrated circuit designs." This patent outlines a method that includes fitting time point coefficients and known time delay values from a delay and slew model of a receiving gate from a timing library. The method also involves determining waveform values for input waveforms and timing values from a timing table in response to the input waveforms. By minimizing a residual of a delay equation, he successfully determines the necessary coefficients.

Career Highlights

Philips is currently employed at Cadence Design Systems, Inc., where he continues to push the boundaries of technology in integrated circuit design. His work has had a lasting impact on the industry, particularly in enhancing the accuracy and efficiency of timing analysis.

Collaborations

Throughout his career, Joel has collaborated with notable colleagues, including Igor Keller and Jijun Chen. These partnerships have fostered innovation and have contributed to the advancement of their shared field.

Conclusion

Joel R. Philips exemplifies the spirit of innovation in the realm of integrated circuit design. His contributions, particularly through his patent, have paved the way for advancements in static timing analysis. His work continues to influence the industry and inspire future innovations.