Bayan Lepas, Malaysia

Jiun Dong Loeh

This inventor holds 2 USPTO granted patents and 2 published patent applications. Top assignee: Sandisk Technologies Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jiun Dong Loeh. Retrieved from https://idiyas.com/inventor/jiun-dong-loeh

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 2 

% Patents Active = 100.0

Average Co-Inventor Count = 4.2

ph-index = 1


Company Filing History:


Years Active: 2026

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2 patents (USPTO):Explore Patents

Title: Jiun Dong Loeh and Selective Wire Coating in Semiconductor Packaging.

Introduction

Jiun Dong Loeh is an inventor associated with Bayan Lepas, Malaysia, and Sandisk Technologies Inc. His patent work addresses a manufacturing challenge in semiconductor-device packaging: electrical shorts that can occur when bond wires move during molding.

Latest Patents

The supplied information lists one patent for Loeh: “Selective wire coating during wire bonding.” The invention describes coating a selected subset of bond wires with an electrically insulating polymer to reduce the risk of shorts caused by wire sweep as molding compound flows during encapsulation. The wires can be selected according to criteria that identify those with a relatively high tendency to form shorts. The patent also describes a specialized wire-bonding tool capable of producing both polymer-coated and bare bond wires. The supplied record lists 1 patent.

Career Highlights

Loeh’s listed invention focuses on a targeted approach to improving reliability during semiconductor manufacturing. By coating only selected wires, the method aims to address higher-risk connections while allowing other bond wires to remain uncoated. The supplied information associates him with Sandisk Technologies Inc.

Collaborations

The supplied information names Darryl Wong Jun Chen and Muhammad Farhan Taufiq Mohamad Helmi as Loeh’s coworkers. Their inclusion provides context about his professional connections, though no specific roles in the patent are provided.

Conclusion

Jiun Dong Loeh’s listed patent presents a selective wire-coating technique intended to reduce molding-related electrical shorts in semiconductor devices. It reflects an invention focused on addressing a specific reliability challenge in the manufacturing process.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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