Heifei, China

Jinjin Cao

This inventor holds 2 USPTO granted patents. Top assignee: Changxin Memory Technologies, Inc.. Active years: 2023-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jinjin Cao. Retrieved from https://idiyas.com/inventor/jinjin-cao

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1


Company Filing History:


Years Active: 2023-2025

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2 patents (USPTO):Explore Patents

Title: Innovations by Jinjin Cao in Semiconductor Technology

Introduction

Jinjin Cao is a notable inventor based in Hefei, China, recognized for his contributions to the semiconductor industry. With a total of two patents to his name, he has made significant advancements in wafer scheduling methods and production capacity determination.

Latest Patents

Cao's latest patents include a "Wafer scheduling method and wafer scheduling apparatus for etching equipment." This invention focuses on improving the productivity of etching equipment by optimizing the transfer time for wafers based on processing requests and equipment parameters. His second patent is a "Method, apparatus and device for determining production capacity boundaries." This innovation involves acquiring data related to production runs and determining time intervals to establish production capacity boundaries effectively.

Career Highlights

Jinjin Cao is currently employed at Changxin Memory Technologies, Inc., where he applies his expertise in semiconductor technology. His work has been instrumental in enhancing the efficiency of production processes within the company.

Collaborations

Cao collaborates with several professionals in his field, including Jianping Wang and Chien-Hung Chen, contributing to a dynamic work environment that fosters innovation.

Conclusion

Jinjin Cao's innovative patents and contributions to semiconductor technology highlight his role as a key figure in advancing the industry. His work continues to influence the efficiency and productivity of semiconductor manufacturing processes.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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