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For the Inventor, By the Inventor

Ossining, NY, United States of America

Jing Li

This inventor holds 47 USPTO granted patents and 6 published patent applications, primarily in Memory Architecture. Top assignees: International Business Machines Corporation, Wisconsin Alumni Research Foundation, Globalfoundries Inc.. Active years: 2009-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jing Li. Retrieved from https://idiyas.com/inventor/jing-li-48o38ewa

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 47 

% Patents Active = 53.2

Average Co-Inventor Count = 2.4

ph-index = 8

Forward Citations = 172(Granted Patents)


Location History:

  • Madison, MN (US) (2011)
  • Ossing, NY (US) (2014)
  • Yorktown Heights, NY (US) (2013 - 2016)
  • Ossining, NY (US) (2013 - 2017)
  • Madison, WI (US) (2009 - 2023)

Company Filing History:

goldMedal33 out of 166,351 
 
International Business Machines Corporation
 patents
silverMedal10 out of 4,238 
 
Wisconsin Alumni Research Foundation
 patents
bronzeMedal2 out of 5,671 
 
Globalfoundries Inc.
 patents
4. 1 out of 59 
 
Globalfoundries U.S. 2 LLC
 patents
5. 1 out of 3 
 
Trafficcast International, Inc.
 patents

Years Active: 2009-2026

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Areas of Expertise:
Phase Change Memory
Content Addressable Memory
Memory Controller
Graph Processor
Semiconductor Device
High-Speed Architecture
Memory Array
Endurance Enhancement
Mixed Cell Array
Drift Mitigation
Self-Aligned Patterning
3D Memory Architecture
47 patents (USPTO):Explore Patents
1. 12688395 - Neural network processor with on-chip convolution kernel storage (2026-07-21),
2. 12566910 - Algorithmic circuit design automation (2026-03-03),
3. 11604829 - High-speed graph processor for graph searching and simultaneous frontier determination (2023-03-14),
4. 10963302 - Spatially programmed logic array architecture (2021-03-30),
5. 10747433 - Computer architecture for high-speed, graph-traversal (2020-08-18),
6. 10503691 - Associative computer providing semi-parallel architecture (2019-12-10),
7. 9979649 - High density content addressable memory (2018-05-22),
8. 9779785 - Computer architecture using compute/storage tiles (2017-10-03),
9. 9711221 - Nonvolatile range-checking content addressable memory (2017-07-18),
10. 9606908 - Memory controller for memory with mixed cell array and method of controlling the memory (2017-03-28),
11. 9563371 - Self-adjusting phase change memory storage module (2017-02-07),
12. 9343545 - Electrical coupling of memory cell access devices to a word line (2016-05-17),
13. 9311009 - Memory with mixed cell array and system including the memory (2016-04-12),
14. 9299804 - Electrical coupling of memory cell access devices to a word line (2016-03-29),
15. 9298383 - Memory with mixed cell array and system including the memory (2016-03-29),

Title: The Innovative Contributions of Jing Li in Graph Processing Technology

Introduction

Jing Li, based in Ossining, NY, is a prolific inventor with an impressive portfolio of 45 patents to his name. His innovative work primarily focuses on advancements in computer architectures and processing technologies, making significant contributions to the field of graph processing.

Latest Patents

Among his latest innovations is the patent for a "High-speed graph processor for graph searching and simultaneous frontier determination." This cutting-edge computer architecture utilizes high-bandwidth memory closely integrated with independent processing elements, facilitating efficient graph searches. The design enables the simultaneous operation of processing elements to determine neighbors and the next frontier, allowing for iterative searches through graph nodes efficiently.

Another notable patent is the "Spatially programmed logic array architecture," which introduces a novel system for spatial compilation of programs in spatially programmed logic circuits (SPLCs). This array system allows for the creation of standardized compiled blocks representing different parts of an SPLC, which can be relocated freely after compilation. The innovative inter-block communication circuitry promotes the joining of blocks within or between SPLCs, enhancing scalability and resource efficiency in program utilization without the need for recompilation.

Career Highlights

Throughout his career, Jing Li has worked with prestigious organizations such as IBM and the Wisconsin Alumni Research Foundation. His experience in these institutions has allowed him to leverage advanced technologies and collaborate on groundbreaking projects, further cementing his reputation as a leader in his field.

Collaborations

Jing Li has collaborated with notable colleagues, including Chung H. Lam and Robert K. Montoye. These partnerships have fueled innovative projects that push the boundaries of technology and contribute to significant advancements in computer architecture and processing systems.

Conclusion

Jing Li's innovative spirit and technical expertise continue to make a profound impact in the realm of graph processing and logic circuit design. With 45 patents under his belt, his contributions pave the way for future advancements in computing technology, showcasing the critical role of inventors in driving innovation forward.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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