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For the Inventor, By the Inventor

Gyeonggi-do, South Korea

Jin Ho Gwon

This inventor holds 4 USPTO granted patents. Top assignees: Hynix Semiconductor Inc., Skhynix Inc., Other. Active years: 2011-2015.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jin Ho Gwon. Retrieved from https://idiyas.com/inventor/jin-ho-gwon-rhqiubql

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 4

% Patents Active = 100.0

Average Co-Inventor Count = 5.5

ph-index = 2

Forward Citations = 35(Granted Patents)


Company Filing History:

goldMedal2 out of 6,228 
 
Hynix Semiconductor Inc.
 patents
silverMedal2 out of 11,659 
 
Skhynix Inc.
 patents
bronzeMedal1 out of 834,513 
Other
 patents
where one patent can have more than one assignee

Years Active: 2011-2015

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4 patents (USPTO):Explore Patents
1. 9070691 - Semiconductor package and stacked semiconductor package having the same (2015-06-30),
2. 8823158 - Semiconductor package and stacked semiconductor package having the same (2014-09-02),
3. 8299591 - Semiconductor package and stacked semiconductor package having the same (2012-10-30),
4. 8024857 - Substrate for semiconductor package having a reinforcing member that prevents distortions and method for fabricating the same (2011-09-27),

Title: Jin Ho Gwon: Innovator in Semiconductor Technology

Introduction

Jin Ho Gwon is a prominent inventor based in Gyeonggi-do, South Korea. He has made significant contributions to the field of semiconductor technology, holding a total of 4 patents. His work focuses on innovative semiconductor packages that enhance performance and efficiency.

Latest Patents

One of Jin Ho Gwon's latest patents involves a semiconductor package and a stacked semiconductor package. This invention includes a substrate with a body that possesses a first region, a second region surrounding the first, and a third region surrounding the second. Wiring lines are strategically placed on the substrate body, with first ends extending to the third region. Connection patterns in the third region are electrically connected to these wiring lines. A semiconductor chip is positioned in the first region and is electrically connected to the wiring lines, while a molding member covers the semiconductor chip in the first and second regions.

Career Highlights

Jin Ho Gwon has worked with notable companies in the semiconductor industry, including SK Hynix Inc. and Hynix Semiconductor Inc. His experience in these organizations has allowed him to develop and refine his innovative ideas in semiconductor packaging.

Collaborations

Throughout his career, Jin Ho Gwon has collaborated with talented individuals such as Jae Sung Oh and Moon Un Hyun. These partnerships have contributed to the advancement of his projects and the successful development of his patents.

Conclusion

Jin Ho Gwon is a key figure in semiconductor innovation, with a focus on enhancing semiconductor packaging technology. His contributions have made a lasting impact on the industry, and his patents reflect his commitment to advancing technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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