The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 30, 2012
Filed:
Dec. 31, 2008
Jae Sung OH, Gyeonggi-do, KR;
Moon Un Hyun, Gyeonggi-do, KR;
Jong Hyun Kim, Seoul, KR;
Jin Ho Gwon, Gyeonggi-do, KR;
Dong You Kim, Chungcheongbuk-do, KR;
Ki Bon Cha, Gyeonggi-do, KR;
Jae Sung Oh, Gyeonggi-do, KR;
Moon Un Hyun, Gyeonggi-do, KR;
Jong Hyun Kim, Seoul, KR;
Jin Ho Gwon, Gyeonggi-do, KR;
Dong You Kim, Chungcheongbuk-do, KR;
Ki Bon Cha, Gyeonggi-do, KR;
Hynix Semiconductor Inc., Gyeonggi-do, KR;
Other;
Abstract
A semiconductor package includes a substrate having a substrate body possessing a first region, a second region which is defined around the first region and a third region which is defined around the second region. Wiring lines are placed on the substrate body, and the wiring lines have first ends that extend to the third region. Connection patterns are placed in the third region and are electrically connected to the first ends of the wiring lines. A semiconductor chip is disposed in the first region and is electrically connected to the respective wiring lines, and a molding member is disposed in the first and second regions and covers the semiconductor chip.