San Jose, CA, United States of America

Jie Qin

This inventor holds 1 USPTO granted patent. Top assignee: Lattice Semiconductor Corporation. Active years: 2015.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jie Qin. Retrieved from https://idiyas.com/inventor/jie-qin-qbls8y16

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 7.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2015

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1 patent (USPTO):Explore Patents

Title: The Innovative Mind of Jie Qin: A Pioneer in Integrated Circuit Testing

Introduction: Jie Qin, an accomplished inventor based in San Jose, California, has made significant contributions to the field of integrated circuit technology. With one notable patent to his name, he is recognized for his innovative thinking and dedication to enhancing the security and efficiency of semiconductor devices.

Latest Patents: Jie Qin holds a patent titled "Highly Secure and Extensive Scan Testing of Integrated Circuits." This patent describes an integrated circuit chip featuring an input/output (I/O) interface and programmable fabric. The design includes strict access controls for scan testing that require a specific scan-testing instruction, a specific manufacturing key, and a specific fabric pattern value derived from a unique set of registers in the programmed fabric. Moreover, the I/O interface is equipped with circuitry capable of enabling scan testing of most logic pertaining to the I/O interface itself, particularly the logic influenced by the JTAG TAP state register.

Career Highlights: Jie Qin's career is marked by his impactful work at Lattice Semiconductor Corporation, where he has leveraged his technical expertise to drive advancements in integrated circuit testing. His innovative patent signifies a leap towards more secure and efficient testing processes, setting new standards within the semiconductor industry.

Collaborations: Throughout his career, Jie has collaborated with notable colleagues, including Wei Han and Zheng Chen. These partnerships have likely fostered a conducive environment for creativity and innovation, contributing to the development of cutting-edge technology in the field.

Conclusion: Jie Qin is a distinguished inventor whose work has transformed the landscape of integrated circuit testing. With his pioneering patent and collaborative efforts, he continues to inspire innovation and advancement in technology. As he moves forward in his career, the contributions of Jie Qin will undoubtedly leave a lasting impact on the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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