Jianjun Cheng

Title: Inventor Spotlight: Jianjun Cheng and His Innovations in FinFET Technology

Introduction

Jianjun Cheng, an accomplished inventor located in San Jose, CA, has made significant strides in the field of semiconductor technology. With a deep understanding of FinFET devices, he holds a patent that focuses on innovative methods to measure the fin height of these advanced transistors.

Latest Patents

Cheng's sole patent, titled "Test structures and method for electrical measurement of FinFET fin height," presents groundbreaking techniques for evaluating fin height in FinFET technology. This patent describes two primary methods: one utilizes an interleaving comb-like test structure devoid of a gate, while the other extracts fin height by analyzing total gate capacitance from FinFETs with differing gate lengths. The advantage of using a gate-less comb-like structure is that it allows for independent measurements of gate dielectric thickness when paired with another structure equipped with a gate.

Career Highlights

Currently, Jianjun Cheng is contributing his expertise at Pdf Solutions, Incorporated. His work focuses on enhancing measurement techniques in semiconductor fabrication, helping to drive innovation in the industry. His understanding of electrical measurement methods has proven beneficial in advancing FinFET technology.

Collaborations

Cheng collaborates closely with notable colleagues, including Sharad Saxena and Yuan Yu. Together, they work on various projects and contribute to the ongoing advancements in semiconductor technology, emphasizing the importance of teamwork in driving innovation.

Conclusion

Jianjun Cheng is a remarkable inventor whose work in electrical measurement methods for FinFET devices exemplifies the creativity and ingenuity present in contemporary semiconductor research. His contributions at Pdf Solutions and collaboration with fellow experts continue to push the boundaries of technology, fostering a brighter future in the field of electronics.