This inventor holds 1 USPTO granted patent. Top assignee: Unimicron Technology Corporation. Active years: 2023.
Company Filing History:
Years Active: 2023
Title: Innovations of Jia Shiang Chen in Chip Packaging Technology.
Introduction
Jia Shiang Chen is a notable inventor based in Taoyuan, Taiwan. He has made significant contributions to the field of chip packaging technology. His innovative approach has led to the development of a unique packaging method that enhances the interconnection between chips.
Latest Patents
Jia Shiang Chen holds a patent for a "Package structure with interconnection between chips and packaging method thereof." This patent outlines a comprehensive packaging method that includes several steps. The process involves forming first and second wiring layers on opposite surfaces of a substrate. It also includes configuring mother substrate interconnecting bumps and cutting along the perimeter of a daughter substrate unit. This innovative package structure allows for interconnecting two chips through a single daughter substrate unit, thereby reducing the area of the daughter substrate unit and shortening the lengths of interconnection paths. As a result, the quality of communication and space utilization is significantly enhanced.
Career Highlights
Jia Shiang Chen is currently employed at Unimicron Technology Corporation, where he continues to innovate in the field of chip packaging. His work has been instrumental in advancing the technology used in electronic devices. His dedication to research and development has positioned him as a key figure in his industry.
Collaborations
Jia Shiang Chen collaborates with talented individuals such as Yu-Shen Chen and Chung-Yu Lan. Their combined expertise contributes to the success of their projects and the advancement of technology at Unimicron Technology Corporation.
Conclusion
Jia Shiang Chen's contributions to chip packaging technology demonstrate his innovative spirit and commitment to enhancing electronic communication. His patent reflects a significant advancement in the field, showcasing the potential for improved efficiency and effectiveness in chip interconnections.
