This inventor holds 1 USPTO granted patent. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: Jhen-Hong Lin: Semiconductor Interconnect Invention.
Introduction
Jhen-Hong Lin is an inventor associated with Hsinchu, Taiwan, and Taiwan Semiconductor Manufacturing Company Limited. His listed patent work concerns silicon interconnect technology and through-substrate vias.
Latest Patents
Lin is credited with 1 patent: “Shielded Through-Substrate Via Structures for Silicon Interconnect Die.” The invention describes a silicon interconnect die with through-substrate via structures extending through a silicon substrate. An insulating spacer layer includes a portion over the substrate’s top surface and tubular portions surrounding the vias. A front metallic shield layer includes a horizontal shield portion and tubular portions surrounding the insulating material.
Career Highlights
The available information connects Lin’s invention work with Taiwan Semiconductor Manufacturing Company Limited and semiconductor interconnect design. The patent focuses on insulating and metallic shielding structures around through-substrate vias.
Collaborations
Lin’s listed coworkers include Cheng-Ming Yu and Mochtar Chandra. Their names are associated with his professional and patent context.
Conclusion
Jhen-Hong Lin’s recorded patent contribution addresses shielded through-substrate vias, combining insulating spacers and metallic shielding in a silicon interconnect die.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile