Taoyuan, Taiwan

Jeng-sian Wu

This inventor holds 1 USPTO granted patent and 4 published patent applications. Top assignee: Panjit International Inc.. Active years: 2026.

USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Jeng-sian Wu: Innovator in Wafer-Level Packaging Technology

Introduction

Jeng-sian Wu is a prominent inventor based in Taoyuan, Taiwan. He has made significant contributions to the field of semiconductor packaging, particularly through his innovative designs and patents. His work focuses on enhancing the reliability and efficiency of wafer-level packaging devices.

Latest Patents

One of Jeng-sian Wu's notable patents is for a wafer-level-package device with peripheral side wall protection. This invention features a die that includes a top surface, a bottom surface, and a peripheral side wall. A cavity is formed on the peripheral side wall of the die, surrounding the die itself. The device incorporates multiple conductive bumps mounted on at least one of the top and bottom surfaces of the die. Additionally, a protection layer covers the die, the cavity, and the conductive bumps, ensuring that the bumps remain exposed from the protection layer. This innovative design aims to improve the durability and performance of semiconductor devices.

Career Highlights

Jeng-sian Wu is currently employed at Panjit International Inc., where he continues to develop cutting-edge technologies in the semiconductor industry. His expertise in wafer-level packaging has positioned him as a key player in advancing packaging solutions that meet the demands of modern electronics.

Collaborations

Throughout his career, Jeng-sian Wu has collaborated with talented professionals in the field, including Chung-hsiung Ho and Wen-Liang Huang. These collaborations have fostered an environment of innovation and have contributed to the successful development of new technologies.

Conclusion

Jeng-sian Wu's contributions to wafer-level packaging technology exemplify his commitment to innovation in the semiconductor industry. His patent for a wafer-level-package device with peripheral side wall protection showcases his ability to address industry challenges effectively. Wu's work continues to influence the future of semiconductor packaging, making him a notable figure in this field.

Profile summary based on public USPTO records.
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